22 lines
318 B
Makefile
22 lines
318 B
Makefile
TARGET=xxd
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CC=gcc
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OBJ = main.o hex.o file.o
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FILES = main.c hex.c file.c
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$(TARGET): $(OBJ)
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mkdir -p ../build
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$(CC) -g -o $(TARGET) $(OBJ)
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mv $(TARGET) ../build/
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debug:
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gcc -g $(FILES)
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main.o: include/hex.h include/file.h
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hex.o: include/hex.h
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file.o: include/file.h
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.PHONY: clean
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clean:
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rm -rf ../build $(OBJ)
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