From c50d3f14a6d2bd4bccacfd89e4a1d7637961fff6 Mon Sep 17 00:00:00 2001
From: Nathan Singer <nathan.r.singer@gmx.com>
Date: Sat, 31 May 2025 20:28:00 -0400
Subject: [PATCH] progress?

---
 kernel/arch/idt/idt.c           | 11 +++++++++--
 kernel/arch/idt/idt_src.s       |  2 ++
 kernel/include/kernel/x86/pic.h | 17 +++++++++++++++++
 kernel/kmain.c                  | 11 +++++++++++
 4 files changed, 39 insertions(+), 2 deletions(-)

diff --git a/kernel/arch/idt/idt.c b/kernel/arch/idt/idt.c
index bc24c87..5937505 100644
--- a/kernel/arch/idt/idt.c
+++ b/kernel/arch/idt/idt.c
@@ -20,7 +20,13 @@ void exception_handler(unsigned int i)
 	kerror("EXCEPTION");
 	printf("Exeption: %u\n", i);
 #endif
-	__asm__ volatile ("cli; hlt"); // hangs the computer
+	if (i <= 31)
+		__asm__ volatile ("cli; hlt"); // hangs the computer
+
+	if (i == PIC_PIT) {
+		printf("Sending EOI instruction to PIT\n");
+		PIC_sendEOI(0);
+	}
 }
 
 void idt_set_descriptor(uint8_t vector, void *isr, uint8_t flags)
@@ -52,7 +58,8 @@ void idt_init(void)
 	__asm__ volatile("lidt %0" : : "m"(idtr)); // load the new IDT
 						  
 	PIC_remap(0x20, 0x28);
-	IRQ_set_mask(0xfd); // unmask IRQ1
+	//IRQ_set_mask(0xfd); // unmask IRQ1
+	pic_disable(); //TODO: this is ending a timer interrupt even though its masked off..
 
 	__asm__ volatile("sti"); // set the interrupt flag
 #ifdef __TESTING__
diff --git a/kernel/arch/idt/idt_src.s b/kernel/arch/idt/idt_src.s
index d4e7e83..4a18477 100644
--- a/kernel/arch/idt/idt_src.s
+++ b/kernel/arch/idt/idt_src.s
@@ -3,6 +3,7 @@ extern exception_handler
 %macro isr_err_stub 1
 isr_stub_%+%1:
 	pushad
+	cld
 	push dword %1
 	call exception_handler
 	popad
@@ -12,6 +13,7 @@ isr_stub_%+%1:
 %macro isr_no_err_stub 1
 isr_stub_%+%1:
 	pushad
+	cld
 	push dword %1
 	call exception_handler
 	popad
diff --git a/kernel/include/kernel/x86/pic.h b/kernel/include/kernel/x86/pic.h
index 19e063b..e4a0bb2 100644
--- a/kernel/include/kernel/x86/pic.h
+++ b/kernel/include/kernel/x86/pic.h
@@ -31,6 +31,23 @@
 #define PIC_READ_ISR	0x0b	/** OCW3 irq service next CMD read **/
 
 
+#define PIC_PIT 32
+#define PIC_KEYB 33
+#define PIC_CASCADE 34 // never raised 
+#define PIC_COM2 35
+#define PIC_COM1 36
+#define PIC_LPT2 37
+#define PIC_FLOPPY_DISK 38
+#define PIC_LPT1 39 // usually spurious interrupt
+#define PIC_CMOS 40
+#define PIC_FREE_ONE 41
+#define PIC_FREE_TWO 42
+#define PIC_FREE_THREE 43
+#define PIC_PS2_MOUSE 44
+#define PIC_FPU 45
+#define PIC_ATA_ONE 46
+#define PIC_ATA_TWO 47
+
 void PIC_sendEOI(uint8_t irq);
 
 /**
diff --git a/kernel/kmain.c b/kernel/kmain.c
index e60f12b..4dbf89a 100644
--- a/kernel/kmain.c
+++ b/kernel/kmain.c
@@ -22,4 +22,15 @@ void kmain(void)
 	serial_initialize();
 #endif
 
+
+/**
+ * The computer is now hanging on INTERRUPT 32,
+ * this is good because that means the PIC is working, its the timer interrupt
+ * we need to now implement the ISR routines in exception_handler,
+ * first i want to implement all of the code for the basic exceptions..
+ * then i want to setup the PIC triggers
+ *
+ * now for keyboard stuff, i believe i need to start looking into setting up a ps/2 driver before the interrupts will even start arriving..
+ *
+ */
 }