diff --git a/kernel/arch/idt/idt.c b/kernel/arch/idt/idt.c index 1517301..01380a0 100644 --- a/kernel/arch/idt/idt.c +++ b/kernel/arch/idt/idt.c @@ -10,22 +10,35 @@ #include #include +#define IDT_MAX_DESCRIPTORS 48 // number of entries in the idt table + +typedef struct { + uint16_t isr_low; // The lower 16 bits of the ISR's address + uint16_t kernel_cs; // The GDT segment selector that the CPU will load into CS before calling the ISR + uint8_t reserved; // set to zero + uint8_t attributes; // Type and attributes + uint16_t isr_high; // The higher 16 bits of the ISR's address +} __attribute__((packed)) idt_entry_t; + __attribute__((aligned(0x10))) static idt_entry_t idt[256]; +typedef struct { + uint16_t limit; + uint32_t base; +} __attribute__((packed)) idtr_t; + static idtr_t idtr; -static bool vectors[IDT_MAX_DESCRIPTORS]; +static bool vectors[IDT_MAX_DESCRIPTORS]; extern struct pit_state pit; #define EXTERNAL_BIT (0x1) - #define TBL_GDT (0x0) #define TBL_LDT (0x2) #define TBL_IDT (0x1) #define TBL_IDT_TWO (0x3) - static void examine_selector(uint32_t selector) { printf("The interrupt arised %s.\n", (selector & EXTERNAL_BIT) == EXTERNAL_BIT ? "externally" : "internally"); @@ -44,11 +57,11 @@ static void examine_selector(uint32_t selector) return; } - #undef TBL_GDT #undef TBL_LDT #undef TBL_IDT #undef TBL_IDT_TWO +#undef EXTERNAL_BIT #define PF_P (1 << 0) #define PF_W (1 << 1) @@ -119,7 +132,29 @@ static void dump_cpu_state(struct cpu_state cpu, struct stack_state stack) } #define EXCEPTION_LOCATION() printf("Exception occurred at 0x%2\n", stack.eip) - +#define EXCEPT_DIV_ERR 0 +#define EXCEPT_DEBUG 1 +#define EXCEPT_NMI 2 +#define EXCEPT_BREAKPOINT 3 +#define EXCEPT_OVERFLOW 4 +#define EXCEPT_BOUND_RANGE_EXCEEDED 5 +#define EXCEPT_INVALID_OPCODE 6 +#define EXCEPT_DEVICE_NOT_AVAILABLE 7 +#define EXCEPT_DOUBLE_FAULT 8 +#define EXCEPT_INVALID_TSS 10 +#define EXCEPT_SEG_NOT_PRESENT 11 +#define EXCEPT_STACK_SEG_FAULT 12 +#define EXCEPT_GENERAL_PROTECTION 13 +#define EXCEPT_PAGE_FAULT 14 +#define EXCEPT_FLOATING_POINT_ERR_FPU 16 +#define EXCEPT_ALIGNMENT_CHECK 17 +#define EXCEPT_MACHINE_CHECK 18 +#define EXCEPT_FLOATING_POINT_ERR_SIMD 19 +#define EXCEPT_VIRT 20 +#define EXCEPT_CTRL_PROT 21 +#define EXCEPT_HYPERVISOR_INJECTION 28 +#define EXCEPT_VMM_COMMUNICATION 29 +#define EXCEPT_SECURITY_EXCEPTION 30 void exception_handler(struct cpu_state __attribute__((unused)) cpu, uint32_t interrupt, struct stack_state stack) { uint32_t inbyte; @@ -157,8 +192,8 @@ void exception_handler(struct cpu_state __attribute__((unused)) cpu, uint32_t in break; case EXCEPT_DOUBLE_FAULT: kerror("EXCEPTION: DOUBLE FAULT"); - __asm__ volatile ("cli; hlt"); // boned - break; + __asm__ volatile ("cli; hlt"); // boned break; + break; // don't need t his but -Werror lol case EXCEPT_INVALID_TSS: kerror("EXCEPTION: INVALID TSS"); examine_selector(stack.error_code); @@ -249,6 +284,30 @@ void exception_handler(struct cpu_state __attribute__((unused)) cpu, uint32_t in break; } } +#undef EXCEPT_DIV_ERR +#undef EXCEPT_DEBUG +#undef EXCEPT_NMI +#undef EXCEPT_BREAKPOINT +#undef EXCEPT_OVERFLOW +#undef EXCEPT_BOUND_RANGE_EXCEEDED +#undef EXCEPT_INVALID_OPCODE +#undef EXCEPT_DEVICE_NOT_AVAILABLE +#undef EXCEPT_DOUBLE_FAULT +#undef EXCEPT_INVALID_TSS +#undef EXCEPT_SEG_NOT_PRESENT +#undef EXCEPT_STACK_SEG_FAULT +#undef EXCEPT_GENERAL_PROTECTION +#undef EXCEPT_PAGE_FAULT +#undef EXCEPT_FLOATING_POINT_ERR_FPU +#undef EXCEPT_ALIGNMENT_CHECK +#undef EXCEPT_MACHINE_CHECK +#undef EXCEPT_FLOATING_POINT_ERR_SIMD +#undef EXCEPT_VIRT +#undef EXCEPT_CTRL_PROT +#undef EXCEPT_HYPERVISOR_INJECTION +#undef EXCEPT_VMM_COMMUNICATION +#undef EXCEPT_SECURITY_EXCEPTION +#undef EXCEPTION_LOCATION void idt_set_descriptor(uint8_t vector, void *isr, uint8_t flags) { @@ -288,3 +347,5 @@ void idt_init(void) kinfo("Initialized the IDT"); #endif } + +#undef IDT_MAX_DESCRIPTORS diff --git a/kernel/include/kernel/x86/idt.h b/kernel/include/kernel/x86/idt.h index 2f290f8..8164f7c 100644 --- a/kernel/include/kernel/x86/idt.h +++ b/kernel/include/kernel/x86/idt.h @@ -3,33 +3,6 @@ #ifndef ARCH_IDT_H #define ARCH_IDT_H -#define IDT_MAX_DESCRIPTORS 48 // number of entries in the idt table - - -#define EXCEPT_DIV_ERR 0 -#define EXCEPT_DEBUG 1 -#define EXCEPT_NMI 2 -#define EXCEPT_BREAKPOINT 3 -#define EXCEPT_OVERFLOW 4 -#define EXCEPT_BOUND_RANGE_EXCEEDED 5 -#define EXCEPT_INVALID_OPCODE 6 -#define EXCEPT_DEVICE_NOT_AVAILABLE 7 -#define EXCEPT_DOUBLE_FAULT 8 -#define EXCEPT_INVALID_TSS 10 -#define EXCEPT_SEG_NOT_PRESENT 11 -#define EXCEPT_STACK_SEG_FAULT 12 -#define EXCEPT_GENERAL_PROTECTION 13 -#define EXCEPT_PAGE_FAULT 14 -#define EXCEPT_FLOATING_POINT_ERR_FPU 16 -#define EXCEPT_ALIGNMENT_CHECK 17 -#define EXCEPT_MACHINE_CHECK 18 -#define EXCEPT_FLOATING_POINT_ERR_SIMD 19 -#define EXCEPT_VIRT 20 -#define EXCEPT_CTRL_PROT 21 -#define EXCEPT_HYPERVISOR_INJECTION 28 -#define EXCEPT_VMM_COMMUNICATION 29 -#define EXCEPT_SECURITY_EXCEPTION 30 - struct cpu_state { uint32_t eax; uint32_t ebx; @@ -49,20 +22,6 @@ struct stack_state { void exception_handler(struct cpu_state cpu, uint32_t interrupt, struct stack_state stack); -typedef struct { - uint16_t isr_low; // The lower 16 bits of the ISR's address - uint16_t kernel_cs; // The GDT segment selector that the CPU will load into CS before calling the ISR - uint8_t reserved; // set to zero - uint8_t attributes; // Type and attributes - uint16_t isr_high; // The higher 16 bits of the ISR's address -} __attribute__((packed)) idt_entry_t; - -typedef struct { - uint16_t limit; - uint32_t base; -} __attribute__((packed)) idtr_t; - -void idt_set_descriptor(uint8_t vector, void* isr, uint8_t flags); void idt_init(void); #endif diff --git a/kernel/kmain.c b/kernel/kmain.c index 443b046..c628516 100644 --- a/kernel/kmain.c +++ b/kernel/kmain.c @@ -72,7 +72,6 @@ void _main(multiboot_info_t* mbd, uint32_t magic) print_main_mem(); - pmm_free_block(a); pmm_free_block(a); print_main_mem();